1. Field of the Invention
The present invention relates to integrated circuits, and, in particular, to high-density programmable logic devices, such as field programmable gate arrays.
2. Description of the Related Art
The advent of high-density programmable logic devices (PLDs), such as field programmable gate arrays (FPGAs), has brought with it difficulties in managing clock delay and clock skew on the devices. What is needed is a clock manager for FPGAs and other programmable logic devices that addresses these needs and other issues in modern systems. These other issues include system functions such as frequency synthesis and pulse-width modulation, as well as system design issues such as allowing a reduced clock frequency on system printed circuit boards while allowing high-speed processing on the FPGA.